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Issue No. 05 - September/October (2003 vol. 23)
ISSN: 0272-1732
pp: 12-25
Daniel Chaver , Universidad Complutense de Madrid
Manuel Prieto , Universidad Complutense de Madrid
Luis Pi?uel , Universidad Complutense de Madrid
Michael C. Huang , University of Rochester
Francisco Tirado , Universidad Complutense de Madrid
<p>To exploit instruction-level parallelism, high-end processors use branch predictors consisting of many large, often underutilized structures that cause unnecessary energy waste and high power consumption. By adapting the branch target buffer's size and dynamically disabling a hybrid predictor's components, the authors create a customized branch predictor that saves a significant amount of energy with little performance degradation.</p>
Daniel Chaver, Manuel Prieto, Luis Pi?uel, Michael C. Huang, Francisco Tirado, "Customizing the Branch Predictor to Reduce Complexity and Energy Consumption", IEEE Micro, vol. 23, no. , pp. 12-25, September/October 2003, doi:10.1109/MM.2003.1240209
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