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ABSTRACT
<p>Integrating reusable cores from multiple sources is essential in system-on-a-chip design. The authors present a hierarchical methodology for testing these cores and the integrated system chip.</p>
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CITATION

H. Lin et al., "A Hierarchical Test Methodology for Systems on Chip," in IEEE Micro, vol. 22, no. , pp. 69-81, 2002.
doi:10.1109/MM.2002.1044301
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