The Community for Technology Leaders
Green Image
ABSTRACT
<p>The Eclipse network-on-a-chip architecture uses a sophisticated parallel programming model, realized through multithreaded processors, interleaved memory modules, and a high-capacity interconnection network to support system-on-a-chip designs.</p>
INDEX TERMS
CITATION
Martti Forsell, "A Scalable High-Performance Computing Solution for Networks on Chips", IEEE Micro, vol. 22, no. , pp. 46-55, September/October 2002, doi:10.1109/MM.2002.1044299
98 ms
(Ver 3.1 (10032016))