Issue No. 05 - September/October (2002 vol. 22)
<p>The increasing complexity of system-on-a-chip designs exposes the limits imposed by the standard synchronous bus. the authors propose a mixed system as a solution.</p>
S. Furber and J. Bainbridge, "Chain: A Delay-Insensitive Chip Area Interconnect," in IEEE Micro, vol. 22, no. , pp. 16-23, 2002.