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ABSTRACT
Chip multiprocessors offer an economical, scalable architecture for future microprocessors. Thread-level speculation support allows them to speed up past software.
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CITATION

K. Olukotun, M. K. Prabhu, M. Chen, L. Hammond, B. A. Hubbert and M. Siu, "The Stanford Hydra CMP," in IEEE Micro, vol. 20, no. , pp. 71-84, 2000.
doi:10.1109/40.848474
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