The Community for Technology Leaders
Green Image
ABSTRACT
Chip multiprocessors offer an economical, scalable architecture for future microprocessors. Thread-level speculation support allows them to speed up past software.
INDEX TERMS
CITATION
Kunle Olukotun, Manohar K. Prabhu, Michael Chen, Lance Hammond, Benedict A. Hubbert, Michael Siu, "The Stanford Hydra CMP", IEEE Micro, vol. 20, no. , pp. 71-84, March/April 2000, doi:10.1109/40.848474
85 ms
(Ver )