Issue No. 05 - October (1996 vol. 16)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/40.540076
To fulfill the computing power required by real-time and embedded applications of image processing such as pattern recognition, shape analysis (using classical or less classical methods such as Neural-Networks), LEP has developed the fully programmable vectorial processor L- Neuro 2.3 which is composed of an array of 12 DSPs (Digital Signal Processors). This chip was designed to reduce the cost at the system level, without scarifying performances in real-time image processing (sorting objects by vision, image analysis), digital signal processing (such as digital transversal filtering - 12 taps filter with 16-bit inputs at 60 MHz, 1-D and 2-D digital convolution and correlation, template matching, Fourier transforms and so on), neurocomputing, fuzzy logics applications and all applications that can take advantage of cooperating DSP. The now available chip is able to perform up to 2 Giga arithmetic operations per second, and has a peak transfer throughput of 2 Gbytes per second.
M. Duranton, "Image Processing by Neural Networks," in IEEE Micro, vol. 16, no. , pp. 12-19, 1996.