, Swiss Center for Electronics and Microtechnology
, Swiss Federal Institute of Technology
Pages: pp. 10-11
Although digital circuits are replacing analog circuits in traditional processing tasks, analog technology will certainly play a dominant role in carrying out real-time perceptive tasks. Indeed, these tasks do not need the precise computation achievable by digital processing. They require the parallel and collective processing of a massive flow of data, for which low-precision analog circuits are more efficient with respect to power consumption and chip area.
Paper contributions to the 1996 MicroNeuro conference, from which we selected the articles for this issue of IEEE Micro, were balanced between analog and digital implementations. However, MicroNeuro confirmed the trend toward analog technology by devoting two full sessions to analog VLSI for vision and for the implementation of new processing schemes inspired by a closer examination of biological solutions. (See the accompanying box for a more thorough description of MicroNeuro 96.)
Selecting a few MicroNeuro papers for revision and adaptation for Micro was not an easy task. To represent the conference profile, we have chosen one article on a digital implementation, four on analog implementations, and one on a very original technical application.
The L-Neuro 2.3 digital architecture developed by M. Duranton of LEP in France is a vector processor composed of an array of 12 DSPs, well adapted to image processing. The operative units are controlled by 286-bit-wide (micro)instructions issued at a 60-MHz frequency. To develop the software, Duranton's group used VML, a virtual machine language defined at UCL London as part of the ESPRIT Galatea project.
In the next article, A. Kramer analyzes the architecture of neural networks—based on summing the output of local operators (synapses) organized in 2D arrays. He shows that this architecture is perfectly suited to exploit the very high efficiency of analog computation when an overall precision of 5 to 6 bits is acceptable. Kramer describes three VLSI chips using different local operators working in different modes: One chip obtains the Manhattan distance in charge mode by exploiting device physics; the second computes the dot product in conductance mode; and the third computes the Euclidean distance in current mode. Each chip has its respective merits with respect to power consumption, speed, chip area, and application domain.
The retinomorphic system K. Boahen describes further demonstrates the high efficiency of analog processing. Far from being just a camera, the retina is an extension of the brain that provides acquisition, conditioning, spatiotemporal filtering, and optimum coding for further communication and processing of the image projected on it. Boahen uses a dense array of analog cells to implement similar features on silicon chips. We expect this silicon retina to drastically enhance the performance of future artificial vision systems, in which it will function as a front end.
The article by G. Indiveri, J. Kramer, and C. Koch shows how to achieve robust operation—despite the very limited precision of low-power, small analog cells—by using collective processing in a cell array. The authors describe three different analog VLSI systems that rely on integrative features of the optical-flow field evaluated by arrays of compact analog velocity sensors. One system obtains the focus of expansion by selecting the steepest and closest zero crossing of velocity. The second evaluates time to contact through summing the activities of velocity sensors arranged on a circle. The third uses motion discontinuity detection to control the local amount of smoothing and thus segment images into different objects.
Analog computation can operate in an essentially passive manner through the distribution of DC current sources in networks of variable linear resistors. We can implement such schemes in VLSI using transistors operated as pseudoconductances. The short article by O. Landolt demonstrates the potential of this approach for the synthesis of any arbitrary nonlinear function of possibly several variables. His architecture is equivalent to the analog implementation of fuzzy rules, and proves very efficient for chip area and the power-delay product.
Biological solutions found in central nervous systems partially inspired all these analog circuits. The last article, by B. Gupta et al., describes an experimental system inspired by the sensor-actuator loops believed to exist in the skin of sharks to achieve active drag reduction. It consists of arrays of micromachined sensors and actuators combined with analog VLSI circuits. The first experiments yield attractive results with possible applications in active drag reduction for critical parts of aircraft wings.
We wish you good reading of this issue, and hope that it will give you some feeling of the need for increased neural network processing power, and how this can be implemented.
MicroNeuro, the International Conference on Microelectronics for Neural Networks, has emerged as the only international forum specifically devoted to all aspects of implementing artificial neural networks and fuzzy systems. In this, it differs from most other conferences on neural networks, which usually relegate hardware implementations to hidden corners of the program. MicroNeuro complements the well-established circuit conferences by addressing the particular requirements of neural and fuzzy systems and by exploiting the related new field of possible solutions. In addition, it emphasizes working devices rather than design proposals. Most of the devices introduced are still experimental, but others are already applicable in the real world.
Like previous conferences, the program of the fifth MicroNeuro, which convened in Lausanne on the shore of Lake Geneva last February, centered on silicon VLSI implementations. A balanced number of contributions outlined digital and analog approaches. Intended applications included pattern, character, and speech recognition; intelligent control; robot navigation; classification; and general problem solving.
MicroNeuro's paper sessions addressed analog VLSI for vision and for the implementation of new processing schemes inspired by a closer examination of biological solutions; further analog implementations of various architecture types and image-processing systems; pulse stream networks, in which pulse duration or frequency represents analog information; and digital implementations including chip architectures and full systems. A special session offered an overview of the various methods that can simplify hardware implementations and the possible use of technologies beyond standard silicon VLSI. Finally, there were 20 posters, each accompanied by a three-minute oral presentation and a discussion period.
Conference proceedings are available from the IEEE Computer Society Press in Los Alamitos, California [phone (714) 821-4641; reference number PR07373; ISBN 0-8186-7373-7].
Due to its specificity and success, in the future MicroNeuro will be organized alternately in the US and in Europe; the next planned locations are Dresden, Denver, and Granada.
Indicate your interest in this article by circling the appropriate number on the Reader Service Card.Low 150 Medium 151 High 152