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Analog circuits are natural candidates to design fuzzy controller chips with optimum speed/power figures for low and medium precision applications, up to about 1%. This paper presents a parallel architecture for fuzzy controllers and a methodology for their realization in the form of analog CMOS chips. These chips can be made to learn through adaptation of some electrically-controllable parameters, guided by a dedicated hardware-compatible learning algorithm. The proposed design methodology emphasizes simplicity at the circuit level -- a prerequisite to increasing processor complexity and operation speed. It is illustrated through a three-input, four-rule controller chip in a 1.5mm CMOS single-poly, double-metal technology.

F. Vidal-Verdú and A. Rodríguez-Vázquez, "Using Building Blocks to Design Analog Neuro-Fuzzy Controllers," in IEEE Micro, vol. 15, no. , pp. 49-57, 1995.
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