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ABSTRACT
<p>Our approach to digital system simulation compiles a high-level system model into a high-performance simulator that consists of software and hardware components. The target architecture for the simulation compiler is a tightly coupled processor and field-programmable gate array. We describe the simulation compiler and show how it can be used to improve simulation performance by up to a factor of two over an all-software simulator.</p>
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CITATION

R. Helaihel, R. Ramirez, K. A. Olukotun and J. Levitt, "A Software-Hardware Cosynthesis Approach to Digital System Simulation," in IEEE Micro, vol. 14, no. , pp. 48-58, 1994.
doi:10.1109/40.296157
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