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<p>The PowerPC 601 microprocessor, the first of a family of processors based on the PowerPC architecture, is described. The general-purpose processor contains a 32-Kb cache and a superscalar machine organization that allows dispatch and execution of up to three instructions each clock cycle. The bus interface and storage control mechanisms can be configured for a wide range of system designs, from low-cost desktop personal computers to high-performance multi-processor systems. The PowerPC architecture, machine organization, chip packaging technology, and performance are discussed.</p>

M. K. Becker, J. S. Muhich, C. R. Moore, D. P. Tuttle and M. S. Allen, "The Power PC 601 Microprocessor," in IEEE Micro, vol. 13, no. , pp. 54-68, 1993.
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