Issue No. 04 - July/August (1991 vol. 11)
pp: 20-23, 62-72
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/40.85722
<p>A description is given of the Gmicro/100, a 32-b VLSI microprocessor based on the TRON specification. The Gmicro/100 five-stage pipeline, prejump mechanism, and bitmap manipulation are examined. Performance results are reported. They show that the prejump mechanism, implemented as a hardware solution for the jump problem, executes benchmark programs 16.8% faster on the average. Optimized microinstructions permit bitmap-manipulation instructions to perform two to five times faster than the software loops. The application-specific standard product approach used to implement Gmicro/100 is discussed.</p>
T. Yoshida, J. Hinata, T. Shimisu and S. Mizugaki, "The Gmicro/100 32-Bit Microprocessor," in IEEE Micro, vol. 11, no. , pp. 20-23, 62-72, 1991.