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Issue No. 04 - July/August (1991 vol. 11)
ISSN: 0272-1732
pp: 20-23, 62-72
ABSTRACT
<p>A description is given of the Gmicro/100, a 32-b VLSI microprocessor based on the TRON specification. The Gmicro/100 five-stage pipeline, prejump mechanism, and bitmap manipulation are examined. Performance results are reported. They show that the prejump mechanism, implemented as a hardware solution for the jump problem, executes benchmark programs 16.8% faster on the average. Optimized microinstructions permit bitmap-manipulation instructions to perform two to five times faster than the software loops. The application-specific standard product approach used to implement Gmicro/100 is discussed.</p>
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CITATION
Toyohiko Yoshida, Junichi Hinata, Toru Shimisu, Shigeo Mizugaki, "The Gmicro/100 32-Bit Microprocessor", IEEE Micro, vol. 11, no. , pp. 20-23, 62-72, July/August 1991, doi:10.1109/40.85722
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