Issue No. 05 - September/October (1989 vol. 9)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/40.45828
<p>The authors present an analog complementary metal-oxide semiconductor (CMOS) version of a model for pattern association, along with discussions of design philosophy, electrical results, and a chip architecture for a 512-element, feed-forward IC. They discuss hardware implementations of neural networks and the effect of limited interconnections. They then examine network design, processor-element design, and system operation.</p>
L. Akers, P. Hasler and M. Walker, "A CMOS Neural Network for Pattern Association," in IEEE Micro, vol. 9, no. , pp. 68-74, 1989.