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ISSN: 0740-7475
Kai-hui Chang , Avery Design Systems , Andover
Hong-Zu Chou , SpringSoft, Hsinchu
Haiqian Yu , Teradyne Inc., North Reading
Dylan Dobbyn , Teradyne Inc., North Reading
Sy-Yen Kuo , National Taiwan University, Taipei
The increasing complexity of integrated circuits pushes for more aggressive design optimizations, such as resetting only part of design registers, that can leave some registers in nondeterministic (X) states. Such Xs may invalidate the correctness of logic simulation due to X-optimism and X-pessimism, producing simulation waveforms that can not be trusted. Although formal methods can resolve the nondeterminism problem, they are not scalable enough to handle today's multi-million gate designs. To address this problem, we developed a scalable X-analysis methodology and successfully applied it to solve three real industrial problems --- one identifies missing Xs in RTL designs while the other two remove incorrect Xs to repair gate-level simulation.
Printed circuits, Logic gates, Integrated circuit modeling, Runtime, Technological innovation, Optimization, Memory management,B.6.3.d Simulation, B.2.2.b Verification, B.5.2.e Verification, B.6.3.f Verification, B.1.3 Control Structure Reliability, Testing, and Fault-Tolerance, B.2.3 Reliability, Testing, and Fault-Tolerance, B.1.3.c Redundant design, B.1.3.b Error-checking, B Hardware, B.6.2 Reliability and Testing, B.1.3.d Test generation, B.1.3.b Error-checking, B.1.3.a Diagnostics, B.1.4.e Verification, B.2.2.b Verification, B.2.2.a Simulation, B.4.5.f Test generation, B.5.2.e Verification, B.6.3.f Verification
Kai-hui Chang, Hong-Zu Chou, Haiqian Yu, Dylan Dobbyn, Sy-Yen Kuo, "Handling Nondeterminism in Logic Simulation So That Your Waveform Can Be Trusted Again", IEEE Design & Test of Computers, vol. , no. , pp. 1, 5555, doi:10.1109/MDT.2011.75
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