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Issue No. 01 - February (2013 vol. 30)
ISSN: 0740-7475
pp: 55-57
G. Smith , Gary Smith EDA, Santa Clara, CA, USA
Gary Smith gives an outlook that looks forward all the way to 2025 and gives insight as to how parallel EDA plays a role in reducing cost.
parallel processing, cost reduction, electronic design automation, electronic design automation, parallel EDA, cost reduction, System-on-a-chip, Design methodology, Computational modeling, Mobile communication, Parallel computing, Costs, Semiconductor device manufacture
G. Smith, "Time Is Money", IEEE Design & Test of Computers, vol. 30, no. , pp. 55-57, February 2013, doi:10.1109/MDT.2012.2228294
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