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TABLE OF CONTENTS
Issue No. 01 - January (vol. 29)
ISSN: 0740-7475
Papers

Yield learning perspectives (Abstract)

R. Aitken , ARM Inc., San Jose, CA, USA
pp. 59-62

Guest Editors' Introduction: Yield Learning Processes and Methods (PDF)

Phil Nigh , Microelectronics Division, IBM Server & Technology Group,
pp. 6-7

Determining a Failure Root Cause Distribution From a Population of Layout-Aware Scan Diagnosis Results (Abstract)

Thomas Herrmann , GLOBALFOUNDRIES, Dresden, Germany
Brady Benware , Mentor Graphics Corp., Wilsonville, OR, USA
Chris Schuermyer , Mentor Graphics Corp., Wilsonville, OR, USA
Manish Sharma , Mentor Graphics Corp., Wilsonville, OR, USA
pp. 8-18

An Industrial Study of System-Level Test (Abstract)

Sounil Biswas , Nvidia, Santa Clara,
Bruce Cory , Nvidia, Santa Clara,
pp. 19-27

Applying the Model-View-Controller Paradigm to Adaptive Test (Abstract)

Yiorgos Makris , Electrical Engineering Department, The University of Texas at Dallas, Richardson, TX, USA
Nathan Kupp , Yale University,
pp. 28-35

Yield Learning Through Physically Aware Diagnosis of IC-Failure Populations (Abstract)

Wing Chiu Tam , Advanced Chip Testing Laboratory, Carnegie Mellon University,
Xiaochun Yu , Advanced Chip Testing Laboratory, Carnegie Mellon University,
Ronald DeShawn Blanton , Advanced Chip Testing Laboratory, Carnegie Mellon University,
Jeffrey E. Nelson , Advanced Chip Testing Laboratory, Carnegie Mellon University,
Osei Poku , Advanced Chip Testing Laboratory, Carnegie Mellon University,
pp. 36-47

Concurrent Device/Specification Cause -- Effect Monitoring for Yield Diagnosis Using Alternate Diagnostic Signatures (Abstract)

Shyam Kumar Devarakond , Georgia Institute of Technology , Atlanta,
Shreyas Sen , Intel Circuit Research Lab , Hillsboro,
Abhijit Chatterjee , Georgia Institute of Technology, Atlanta,
Soumendu Bhattacharya , Texas Instruments, Dallas,
pp. 48-58

Patents in the IEEE Standards Process (Abstract)

Stan Krolikoski , Cadence Design Systems,
pp. 68-71

CEDA Currents (PDF)

pp. 73-74

Test Technology TC Newsletter (PDF)

Partha Pande , School of Electrical Engineering and Computer Science, Washington State University, Pullman,
pp. 76-77

Yield of Black Swans (PDF)

Scott Davidson , Oracle,
pp. 80

Patents in the IEEE Standards Process (Abstract)

Stan Krolikoski , Cadence Design Systems,
pp. 68-71
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