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Issue No. 06 - Nov.-Dec. (2011 vol. 28)
ISSN: 0740-7475
pp: 24-31
Chester Liu , National Taiwan University
En-Hua Ma , National Taiwan University
Wen-En Wei , National Taiwan University
James Chien-Mo Li , National Taiwan University
I-Chun Cheng , National Taiwan University
Yung-Hui Yeh , Industrial Technology Research Institute
ABSTRACT
<p>Editors' note:</p><p>Mechanical strain significantly affects thin-film transistor (TFT) device mobility; thus, strain awareness is indispensable to flexible TFT circuit design. This article presents a strain-aware placement technique to enhance TFT logic circuit performance in the presence of mechanical stress.</p><p align="right">&#x2014;Jiun-Lang Huang (National Taiwan University) and Kwang-Ting (Tim) Cheng (University of California, Santa Barbara)</p>
INDEX TERMS
design and test, flexible TFT, digital circuits, placement optimization
CITATION

W. Wei, Y. Yeh, E. Ma, C. Liu, I. Cheng and J. C. Li, "Placement Optimization of Flexible TFT Digital Circuits," in IEEE Design & Test of Computers, vol. 28, no. , pp. 24-31, 2011.
doi:10.1109/MDT.2011.92
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