Issue No. 04 - July/August (2011 vol. 28)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MDT.2011.46
Greg Stitt , University of Florida
Alan George , University of Florida
Herman Lam , University of Florida
Melissa Smith , Clemson University
Vikas Aggarwal , University of Florida
Gongyu Wang , University of Florida
James Coole , University of Florida
Casey Reardon , MITRE Corp.
Brian Holland , SRC Computers, LLC
Seth Koehler , Altera Corp.
<p><it>Editor's note:</it></p><p>As part of their ongoing work with the National Science Foundation (NSF) Center for High-Performance Reconfigurable Computing (CHREC), the authors are developing a complete tool chain for FPGA-based acceleration of scientific computing, from early-stage assessment of applications down to rapid routing. This article provides an overview of this tool chain.</p><p align="right"><it>—George A. Constantinides (Imperial College London) and Nicola Nicolici (McMaster University)</it></p>
design and test, FPGAs, reconfigurable computing, productivity, design automation, design-space exploration, tool flow
V. Aggarwal et al., "An End-to-End Tool Flow for FPGA-Accelerated Scientific Computing," in IEEE Design & Test of Computers, vol. 28, no. , pp. 68-77, 2011.