Issue No. 03 - May/June (2011 vol. 28)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MDT.2011.57
RASDAT 2011: Workshop on Reliability-Aware System Design and Test
The second IEEE International Workshop on Reliability Aware System Design and Test (RASDAT) was held in conjunction with the 24th International Conference on VLSI Design in Chennai, India, on 6-7 January 2011 ( http://www.serc.iisc.ernet.in/~viren/RASDAT11/). The RASDAT workshop, which attracted more than 70 attendees, addresses future challenges in identifying techniques that efficiently combine test and reliability to ensure the production of reliable systems.
The first keynote address was given by John Carulli (Texas Instruments), and the second keynote address was given by Michel Renovell (LIRMM). Masahiro Fujita (Tokyo University) presented an embedded tutorial session on postsilicon debug. Three invited talks were given by Arun Somani (Iowa State University), Sanjit Seshia (University of California, Berkeley), and M. Ravindra (Indian Space Research Organisation).
At three sessions—"Power Aware Design and Test," "VLSI Test," and "Reliable Systems"—10 papers were presented, and four papers were featured at a poster session. A special session on hardware security was chaired by Ilia Polian (University of Passau), with speakers Michiko Inoue (Nara Institute of Science and Technology) and Rajat Moona (Indian Institute of Technology, Kanpur). The workshop concluded with a panel on "Volume Diagnosis: Power in Numbers?" moderated by Ilia Polian with panelists Srikant Venkataraman (Intel), Nagesh Tamrapalli (AMD, India), Rubin Parekhji (Texas Instruments, India), Adit Singh (Auburn University), and Kewal Saluja (University of Wisconsin-Madison).
General chairs were Adit Singh (Auburn University) and Virendra Singh (Indian Institute of Science, Bangalore). Program chairs were Rubin Parekhji (Texas Instruments, India) and Erik Larsson (Linköping University).
The third IEEE International Workshop on Reliability Aware System Design and Test (RASDAT) will be held in conjunction with the 25th International Conference on VLSI Design in Hyderabad, India, on 7-8 January 2012.