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Issue No. 03 - May/June (2011 vol. 28)
ISSN: 0740-7475
pp: 54-63
Ilia Polian , University of Passau
John P. Hayes , University of Michigan, Ann Arbor
<p>As ICs shrink into the nanometer range, they are increasingly subject to errors induced by physical faults. Traditional hardening for error mitigation consumes too much area and energy to be cost-effective in commercial applications. Selective hardening, applied only to a design's most error-sensitive parts, offers an attractive alternative. This article reviews recently proposed techniques to selectively harden nanoelectronics and achieve very low error levels.</p>
design and test, selective hardening, soft errors, reliability, fault tolerance, error tolerance

J. P. Hayes and I. Polian, "Selective Hardening: Toward Cost-Effective Error Tolerance," in IEEE Design & Test of Computers, vol. 28, no. , pp. 54-63, 2010.
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