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Issue No.03 - May/June (2011 vol.28)
pp: 44-51
B Vermeulen , NXP Semicond., Netherlands
K Goossens , Electr. Eng. Dept., Eindhoven Univ. of Technol., Eindhoven, Netherlands
Systems with elaborate multiple clock distributions are a necessity, and the authors address the postfabrication debug of such multiclock systems. Solutions, based on the authors' communication-centric debug approach, are presented that achieve a consistent snapshot of the system state and force the erroneous state in the face of nondeterminism.
system-on-chip, clocks, electronic engineering computing, interactive systems, communication centric debug approach, interactive SoC debugging, multiple clock distribution, postfabrication debug, System-on-a-chip, IP networks, Debugging, Monitoring, Synchronization, Multicore processing, debug abstraction techniques, design and test, embedded SoC, network on chip, multiple clocks, silicon validation, silicon debug, software debug, consistent global state dumps, handshake signals, communication-centric debug
B Vermeulen, K Goossens, "Interactive Debug of SoCs with Multiple Clocks", IEEE Design & Test of Computers, vol.28, no. 3, pp. 44-51, May/June 2011, doi:10.1109/MDT.2011.42
1. B. Roberts, "The Verities of Verification," Electronic Business, vol. 29, no. 8, 2003, pp. 26-32.
2. B. Vermeulen, "Functional Debug Techniques for Embedded Systems," IEEE Design & Test, vol. 25, no. 3, 2008, pp. 208-215.
3. K.M. Chandy and L. Lamport, "Distributed Snapshots: Determining Global States of Distributed Systems," ACM Trans. Computer Systems, vol. 3, no. 1, 1985, pp. 63-75.
4. AMBA AXI Protocol Specification, ARM Ltd., June 2003.
5. J. Kinniment, Synchronization and Arbitration in Digital Systems, John Wiley & Sons, 2008.
6. P. Dahlgren, P. Dickinson, and I. Parulkar, "Latch Divergency in Microprocessor Failure Analysis," Proc. Int'l Test Conf. (ITC 03), IEEE CS Press, 2003, pp. 755-763.
7. B. Vermeulen and K. Goossens, "Debugging Multi-Core Systems on Chip," Multi-Core Embedded Systems, G. Kornaros ed., CRC Press/Taylor & Francis Group, 2010, pp. 153-198.
8. M.W. Heath, W.P. Burleson, and I.G. Harris, "Synchro-Tokens: A Deterministic GALS Methodology for Chip-Level Debug and Test," IEEE Trans. Computers, vol. 54, no. 12, 2005, pp. 1532-1546.
9. M. Ronsse and K. de Bosschere, "RecPlay: A Fully Integrated Practical Record/Replay System," ACM Trans. Computer Systems, vol. 17, no. 2, 1999, pp. 133-152.
10. K. Goossens and A. Hansson, "The Aethereal Network on Chip after Ten Years: Goals, Evolution, Lessons, and Future," Proc. 47th Design Automation Conf. (DAC 10), ACM Press, 2010, pp. 306-311.
11. B. Vermeulen, T. Waayers, and S.K. Goel, "Core-Based Scan Architecture for Silicon Debug," Proc. Int'l Test Conf. (ITC 02), IEEE Press, 2002, pp. 638-647.
12. A. Nieuwland et al., "C-HEAP: A Heterogeneous Multi-Processor Architecture Template and Scalable and Flexible Protocol for the Design of Embedded Signal Processing Systems," Design Automation for Embedded Systems, vol. 7, no. 3, 2002, pp. 229-266.
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