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EDA: Synergy or sum of the parts?

Igor L. , University of Michigan

Pages: pp. pp. xx-xx

Abstract—This is a review of Electronic Design Automation: Synthesis, Verification and Test (Systems on Silicon) by Laung-Terng Wang, Yao-Wen Chang, and Kwang-Ting (Tim) Cheng, eds.

Keywords—design and test, EDA, verification, optimization, post-silicon debug

Historically, EDA has been compartmentalized into several major technical areas, and it is difficult for any one expert to stay current in all areas. On the other hand, modern EDA components are increasingly interconnected. As one important example, considerations of circuit test and post-silicon debug prohibit some powerful logic optimizations—register retiming muddles the correspondence between the actual chip and its HDL description. For another example, certain high-level logic constructs tend to create netlists that stump physical design tools—long switch statements are typically compiled into large multiplexers, whose many input signals cannot be routed without significant congestion.

Electronic Design Automation: Synthesis, Verification and Test, edited by Laung-Terng Wang, Yao-Wen Chang, and Kwang-Ting (Tim) Cheng is a spectacular attempt to bring the various components of EDA together and cover them in one book at comparable levels of detail. Weighing in at almost 1,000 pages, it integrates contributions by 25 authors from universities and companies in Canada, China, Japan, Taiwan, and the US. Compared to other such collective efforts in EDA, the book achieves better consistency between its chapters in the level of detail, writing style, and quality of illustrations. Intended as a teaching aid, it offers a variety of exercises in every chapter, a solid bibliography for each chapter, plus a comprehensive index of terms at the book's end.

The editors clearly made a great effort to ensure the cohesiveness of material submitted by different authors. Chapter 1 offers a top-level discussion of EDA, while three subsequent chapters offer background material in CMOS, design for testability, and algorithms. As usually happens with such preparatory material, the discussion is somewhat detached from applications and real uses, appearing unnecessarily encyclopedic within the context of this book. However, there is indisputable tutorial value in the 60-page Chapter 2, "Fundamentals of CMOS Design," which covers various logic families and standard cell layout, and touches on several low-power design techniques, such as clock gating.

I would have expected "Design for Testability"—Chapter 3 (70 pages)—to appear later in the book, but the writing on scan chains, BIST, and test compression is thorough, and this chapter's tutorial value is similarly indisputable. Notably, the three chapters that cover circuit test are separated and could have been better coordinated.

Chapter 4, at only 50 pages, covers topics like big-Oh notation, NP-completeness, graph algorithms, heuristics, and mathematical programming. Among surprises, I found that dynamic programming and branch-and-bound are classified under heuristics, right next to simulated annealing and genetic algorithms. The chapters on linear programming and integer linear programming focus on solution algorithms, which are very rarely programmed today, given the abundance and sophistication of high-performance software tools for LP and ILP. It may have been more instructive to illustrate typical tricks for modeling applications in terms of LPs and ILPs. I would also trade some of the advanced graph algorithms (like Edmonds-Karp) for basic computational geometry tasks, such as finding convex hulls and constructing Delaunay triangulations.

Chapters 5 through 14 can be roughly broken into four categories: high-level and logic synthesis (chapters 5 and 6), simulation and verification (chapters 8 and 9), test (chapters 7 and 14), and, finally, physical design (chapters 10 through 13), which includes treatment of clock and power-ground networks. Some chapters are written from a top-down industrial perspective, such as Chapter 9 ("Functional Verification"). This chapter starts with a hierarchical classification of verification techniques, proceeds to discuss coverage metrics, and only then explores simulation-based and formal verification techniques.

Other chapters, notably those on physical design, are written bottom-up and focus on individual algorithmic techniques, sometimes without a clear top-down view of how they are used or integrated into a design flow. Arguably, some techniques described are already obsolete and given mostly for completeness, but this may be unclear to the reader. Additionally, some chapters do a better job than others to connect the reader with further reading resources that describe the field's state of the art.

The book offers great breadth, but with some surprising omissions—FSM synthesis and sequential optimizations are not covered at all, but the chapter on verification would be incomprehensible without this knowledge. Arguably, any student specializing in digital logic should have some exposure to FSMs. Timing analysis is covered under logic synthesis and may be hard to find at first glance. The book emphasizes classical topics in EDA but leaves out several modern themes, such as post-silicon debug and physically driven logic optimizations—this is probably OK, given that the book is already close to 1,000 pages. Explanations are generally clear and well-illustrated. Many specific concepts are explained better than in any conference or journal paper I have seen: for example, analytical placement algorithms, and routing techniques to avoid antenna effects. Unfortunately, the book makes no attempt to be more than "the sum of components"; a modern EDA flow, however, is not just a sum of its parts but requires careful planning of links between individual components to achieve synergy.

It is common to summarize or review presented material in a closing chapter, which can also elucidate important technical connections between different topics that could not have been explained within individual chapters. However, the book ends abruptly with a chapter on test generation, thereby missing the opportunity to outline the big picture of EDA beyond Chapter 1.

All that said, the book is a valuable contribution to the practice of EDA and is currently the best available textbook in the field. I highly recommend it to EDA students, researchers, and industry practitioners—no single EDA expert knows all this material. Electronic Design Automation: Synthesis, Verification and Test, however, is not for the faint of heart. It is physically heavy and its material can easily overwhelm students with insufficient motivation to study EDA or limited experience with advanced algorithms. Graduate students specializing in modern topics like formal verification, physical synthesis, and post-silicon debug may need to supplement this book with additional foundational resources. While this audacious attempt to bring together all major EDA topics has largely succeeded, conciseness is not a forte of this book. Another concern is that most topics are covered in isolation (given the 25 authors, this may be understandable, but presents a dilemma that editors should anticipate), with little attention paid to the need for collaboration between different EDA domains and possible synergies between different stages of the EDA flow. Perhaps this is the challenge for the next great EDA textbook.

Reviewed in this issue



Electronic Design Automation: Synthesis, Verification and Test (Systems on Silicon), by Laung-Terng Wang, Yao-Wen Chang, and Kwang-Ting (Tim) Cheng, eds. (Morgan Kaufmann, 2009, ISBN: 978-0-1237-4364-0, 934 pp.).

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