Issue No. 01 - January/February (2011 vol. 28)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MDT.2010.115
Masood Qazi , MIT, CAMBRIDGE
Mahmut Sinangil , MIT, 02139
Anantha Chandrakasan , MIT, 02139
<p>Editor's note:</p><p>SRAMs capable of operating at extremely low supply voltages—for example, below the transistor threshold voltage—can enable ultra-low-power battery-operated systems by allowing the logic and memory to operate at the same optimal supply voltage. This review article presents SRAM techniques including new bit cells, novel sensing schemes, and read/write assist circuits for ultra-low-power applications.</p><p align="right">—Chris H. Kim, University of Minnesota</p>
design and test, SRAM, CMOS memory circuits, random-access storage, cache memories, embedded memory, low-power electronics, low-voltage electronics
A. Chandrakasan, M. Qazi and M. Sinangil, "Challenges and Directions for Low-Voltage SRAM," in IEEE Design & Test of Computers, vol. 28, no. , pp. 32-43, 2010.