Pages: pp. 78-79
Abstract—This month's TTTC newsletter features synopses of past events and of upcoming events.
Keywords—ATE Vision 2020, ATS 2010, D3T-2010, EWDTS 2010, ITC 2010
17–20 September 2010
St. Petersburg, Russia
The main goal of the IEEE East-West Design and Test Symposium (EWDTS) is for technologists and scientists from Eastern and Western Europe, as well as North America and other parts of the world, to exchange experiences in the field of design, design automation, and test of electronic circuits and systems. The symposium aims to attract attendees especially from the Newly Independent States and countries around the Black Sea and Central Asia. EWDTS 2010, held in St. Petersburg, Russia, presented a total of 111 papers from 34 participating countries. The symposium also featured four keynote talks, by speakers Adit Singh (Auburn University, USA), Yervant Zorian (Virage Logic, USA), Paolo Prinetto (Politecnico di Torino, Italy), and Michel Renovell (LIRMM, France). In addition, the symposium also had 12 invited talks.
15 July 2010
San Francisco, California
ATE Vision, which won the IEEE/TTTC most successful workshop award, is the only dedicated IEEE workshop to focus on examining where the ATE industry is heading, in the near term as well as the long term. Various technology and business trends—such as multiple cores on a die, and 3D trends enabled by die-stacking and through-silicon vias—pose significant challenges to the ATE industry. To meet those challenges, the industry needs to innovate in areas beyond the traditional ATE niche. In 2010, ATE Vision, held in San Francisco in conjunction with Semicon West, featured a keynote address by Ron Leckie (Infrastructure Advisors). In addition to traditional paper presentations in sessions on "Innovative Test Methodologies," "Breakthroughs in Test Software," and "Reducing Cost of Test," the workshop had two panel discussions: one on test requirements, and one on test solutions.
31 October–5 November 2010
From its beginnings as an informal gathering of engineers in 1970 at Cherry Hill, New Jersey, ITC has grown into the Test Week event, with more than a hundred papers, panels, tutorials, workshops, lecture series sessions, and case studies, in addition to an exhibition, poster session, and important keynote and invited speeches. ITC is known for a tradition of lively debates over test issues that continue during breaks and social gatherings. A multitude of companies choose ITC to demonstrate major new test products and services in the concurrent exhibition.
ITC is the world's premier conference dedicated to the electronic test of devices, boards, and systems. The event spans the complete cycle from design verification, DFT, design for manufacturing, silicon debug, manufacturing test, system test, diagnosis, failure analysis, and back to process and design improvement.
4–5 November 2010
As technology scales, various new types of defects are presenting unique challenges to the test community. New test defect and data based methodologies are required to detect, monitor, and comprehend the various defect mechanisms at sub-50nm technology nodes and their impact on product quality and in-field reliability. Defect and data-driven testing (D3T) uses data to reduce defect levels, increase reliability, and to diagnose and solve yield problems. D3T can provide the basis for adaptive test decisions on which test conditions, tests, or test subsets to add or remove, it can also be used for improving the overall quality of test by the use of outlier analysis. However, the process of how to implement and analyze test and defect data in making these decisions is not widely understood or utilized in the industry. Closing the gap on knowledge of the process, new test techniques, and how defect models are being used to adapt test flows will be the goals of this year's D3T workshop. The workshop will be held in conjunction with ITC.
1–4 December 2010
ATS 2010, the 19th in this series of symposia begun in 1992, is devoted to testing and fault-tolerant computing. ATS is now recognized as the primary event for covering many dimensions of testing for computing systems. Following tradition, this year's ATS, organized by the Shanghai University, aims at providing a more open forum for worldwide researchers and industrial practitioners to exchange their innovative ideas on testing technology for both hardware and software in computing systems. ATS 2010 will stress the theme of "New development and applications of testing technology," covering all aspects of technical issues on DFT, test integration, diagnosis, repair, and yield enhancement of a complex chip with embedded digital, analog, and/or memory components. A tutorial will be held on "The Convergence and Interrelationship of Yield, Design for Manufacturability, and Test." A panel session will explore "Testing Nanoelectronic Circuits under Massive Statistical Process Variations."
I would appreciate input and suggestions about the newsletter from the test community. Please forward your ideas, contributions, and information on awards, conferences, and workshops to Partha Pande, School of Electrical Engineering and Computer Science, Washington State University, PO Box 642752, Pullman, WA 99164-2752; firstname.lastname@example.org.
Editor, TTTC Newsletter
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