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Issue No.04 - July/August (2010 vol.27)
pp: 32-43
Patrick Yin Chiang , Oregon State University
Sirikarn Woracheewan , Oregon State University
Changhui Hu , Oregon State University
Lei Guo , Oregon State University
Rahul Khanna , Intel
Jay Nejedlo , Intel
Huaping Liu , Oregon State University
<p>Editor's note:</p><p>This article advocates the use of short-range wireless communication inside a computing chassis. Ultrawideband links make it possible to design a within-chassis wireless interconnect. In contrast to conventional, fixed, wireline connections between chips, wireless communications offer certain unique advantages, as the authors explain.</p><p align="right">&#x2014;Partha Pande, Washington State University</p>
design and test, EMI, JTAG, server, side-band communications, ultrawideband, wireless interconnect
Patrick Yin Chiang, Sirikarn Woracheewan, Changhui Hu, Lei Guo, Rahul Khanna, Jay Nejedlo, Huaping Liu, "Short-Range, Wireless Interconnect within a Computing Chassis: Design Challenges", IEEE Design & Test of Computers, vol.27, no. 4, pp. 32-43, July/August 2010, doi:10.1109/MDT.2010.56
1. W.-H. Chen et al., "A 6-Gb/s Wireless Inter-chip Data Link Using 43-GHz Transceivers and Bond-Wire Antennas," IEEE J. Solid-State Circuits, vol. 44, no. 10, 2009, pp. 2711-2721.
2. A.P. Chandrakasan et al., "Low-Power Impulse UWB Architectures and Circuits," Proc. IEEE, vol. 97, no. 2, 2009, pp. 332-352.
3. B.A. Floyd, C.-M. Hung, and K.K. O, "Intra-chip Wireless Interconnect for Clock Distribution Implemented with Integrated Antennas, Receivers, and Transmitters," IEEE J. Solid-State Circuits, vol. 37, no. 5, 2002, pp. 543-552.
4. C. Hu et al., "Transmitter Equalization for Multipath Interference Cancellation in Impulse Radio, Ultra-Wideband (IR-UWB) Transceivers," Proc. IEEE Int'l Symp. VLSI Design, Automation, and Test, IEEE Press, 2009, pp. 307-310.
5. S. Lo et al., "A Dual-Antenna Phased-Array UWB Transceiver in 0.18-CMOS," IEEE J. Solid-State Circuits, vol. 41, no. 12, 2006, pp. 2776-2786.
6. R. Palmer et al., "A 14mW 6.25Gb/s Transceiver in 90nm CMOS for Serial Chip-to-Chip Communications," Proc. Int'l Solid-State Circuits Conf. (ISSCC 07), vol. 50, IEEE Press, 2007, pp. 9-11.
7. C. Marcu et al., "A 90nm CMOS Low-Power 60GHz Transceiver with Integrated Baseband Circuitry," Proc. Int'l Solid-State Circuits Conf. (ISSCC 08), IEEE Press, 2008, pp. 314-315.
8. S. Palermo, A. Emami-Neyestanak, and M. Horowitz, "A 90nm CMOS 16Gb/s Transceiver for Optical Interconnects," IEEE J. Solid-State Circuits, vol. 43, no. 5, 2008, pp. 1235-1246.
9. K. Hu et al., "A 0.6mW/Gbps, 6.4-8.0Gbps Serial Link Receiver Using Local, Injection-Locked Ring Oscillators in 90nm CMOS," Proc. Symp. IEEE VLSI Circuits, IEEE Press, 2009, pp. 46-47.
10. A. Roy and M.H. Chowdhury, "RF/Wireless Interconnects in Future On-Chip and Board-Level Clock Distribution Network," Proc. 7th IEEE Int'l Conf. Electro/Information Technology (EIT 07), IEEE Press, 2007, pp. 542-545.
11. J. Lee, Y. Chen, and Y. Huang, "A Low-Power Low-Cost Fully-Integrated 60-GHz Transceiver System with OOK Modulation and On-Board Antenna Assembly," IEEE J. Solid-State Circuits, vol. 45, no. 2, 2010, pp. 264-275.
12. B. Verbruggen et al., "A 2.6mW 6b 2.2GS/s 4-times Interleaved Fully Dynamic Pipelined ADC in 40nm Digital CMOS," Proc. IEEE Int'l Solid-State Circuits Conf. (ISSCC 10), IEEE Press, 2010, pp. 296-297.
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