Issue No. 01 - January/February (2010 vol. 27)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MDT.2010.24
Alex Baumgarten , Microsoft
Akhilesh Tyagi , Iowa State University
Joseph Zambreno , Iowa State University
<p>Editor's note:</p><p>Hardware metering to prevent IC piracy is a challenging and important problem. The authors propose a combinational locking scheme based on intelligent placement of the barriers throughout the design in which the objective is to maximize the effectiveness of the barriers and to minimize the overhead.</p><p align="right"><it>—Farinaz Koushanfar, Rice University</it></p>
design and test, hardware metering, IC fabrication, IC piracy, IC security, reconfigurable-logic barriers, selection heuristics
A. Tyagi, J. Zambreno and A. Baumgarten, "Preventing IC Piracy Using Reconfigurable Logic Barriers," in IEEE Design & Test of Computers, vol. 27, no. , pp. 66-75, 2010.