Issue No. 06 - November/December (2009 vol. 26)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MDT.2009.135
Dongwoo Lee , Korea Aerospace University
Jongwhoa Na , Korea Aerospace University
<p>Editor's note:</p><p>Presilicon testing and verification is a crucial step in qualifying the RTL for the subsequent implementation phases. This article presents a novel simulation-based fault injection methodology that is applied at the system description level, as opposed to the lower, flattened RT level, in order to reduce simulation time.</p><p align="right"><it>—Pradip Bose, IBM Research</it></p>
design and test, electronic systems level, fault injection, kernel-based fault injection, reliability
D. Lee and J. Na, "A Novel Simulation Fault Injection Method for Dependability Analysis," in IEEE Design & Test of Computers, vol. 26, no. , pp. 50-61, 2009.