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Issue No. 05 - September/October (2009 vol. 26)
ISSN: 0740-7475
pp: 36-47
Tong Zhang , Rensselaer Polytechnic
Jibang Liu , Rensselaer Polytechnic
Jian-Qiang Lu , Rensselaer Polytechnic
Nanning Zheng , Xi'an Jiaotong University
Kenneth Rose , Rensselaer Polytechnic
Hongbin Sun , Xi'an Jiaotong University
<p>Editor's note:</p><p>From a system architecture perspective, 3D technology can satisfy the high memory bandwidth demands that future multicore/manycore architectures require. This article presents a 3D DRAM architecture design and the potential for using 3D DRAM stacking for both L2 cache and main memory in 3D multicore architecture.</p><p align="right"><it>&#x2014;Yuan Xie, Pennsylvania State University</it></p>
3D integration, design and test, multicore, DRAM, memory hierarchy
Tong Zhang, Rakesh S. Anigundi, Jibang Liu, Jian-Qiang Lu, Nanning Zheng, Kenneth Rose, Hongbin Sun, "3D DRAM Design and Application to 3D Multicore Systems", IEEE Design & Test of Computers, vol. 26, no. , pp. 36-47, September/October 2009, doi:10.1109/MDT.2009.105
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