Issue No. 04 - July/August (2009 vol. 26)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MDT.2009.80
Philippe Coussy , Université de Bretagne-Sud
Andres Takach , Mentor Graphics
<p>Design complexity is continually rising with the higher levels of integration implied by Moore's law. Functional complexity increases as more computation is added to SoCs and as more-complex applications are developed. Additional complexity is introduced by the need to control power consumption and to tackle challenges with respect to physical timing closure and process variations. To manage this complexity requires automation, letting designers focus on high-level design decisions that have the most effect in the implementation's quality. A higher level of hardware design abstraction also enables an effective exploration of software and hardware architectures, making high-level synthesis a cornerstone of electronic system-level design. This special issue features nine articles that the authors believe will generate interest in the use of high-level synthesis and its further development.</p>
high-level synthesis, hardware design, abstraction, design and test
P. Coussy and A. Takach, "Guest Editors' Introduction: Raising the Abstraction Level of Hardware Design," in IEEE Design & Test of Computers, vol. 26, no. , pp. 4-6, 2009.