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Issue No. 01 - January/February (2009 vol. 26)
ISSN: 0740-7475
pp: 98-101
Scott Davidson , Sun Microsystems
ABSTRACT
This is a review of System on Chip Test Architectures: Nanometer Design for Testability (edited by Laung-Terng Wang, Charles E. Stroud, and Nur A. Touba). Overall, this is a good guide to the frontiers of test. For most of the chapters, the selection of subjects and the detail level is just right, largely because this book is a follow-on to a more introductory book, VLSI Test Principles and Architectures. If one of the more basic books on testing is not adequate for your requirements, this text would make a nice addition to your library. It would also do well as a text in an advanced graduate course.
INDEX TERMS
SoC, test architecture, MEMS, DFT, SiP, TAM, random access scan, FPGA, nanotechnologies
CITATION

S. Davidson, "A second course on testing," in IEEE Design & Test of Computers, vol. 26, no. , pp. 98-101, 2009.
doi:10.1109/MDT.2009.2
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