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Issue No. 01 - January/February (2009 vol. 26)
ISSN: 0740-7475
pp: 78-87
Pascal Fouillat , Ecole Nationale Supérieure d'Electronique de Bordeaux
Noëlle Lewis , Bordeaux University
Jean Tomas , Bordeaux University
Timothée Levi , LIMMS, University of Tokyo
This article presents a CMOS resizing methodology for analog circuits during a technology migration, with easy-to-apply scaling rules based on a simple MOS transistor model. The goals are to transpose a circuit topology from one technology to another while preserving the main figures of merit and to quickly calculate the new transistor dimensions.
analog design, design reuse, MOS technology, resizing methodology, technology migration
Pascal Fouillat, Noëlle Lewis, Jean Tomas, Timothée Levi, "A CMOS Resizing Methodology for Analog Circuits", IEEE Design & Test of Computers, vol. 26, no. , pp. 78-87, January/February 2009, doi:10.1109/MDT.2009.1
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