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Issue No.01 - January/February (2009 vol.26)
pp: 18-25
Benoit Nadeau-Dostie , LogicVision
Saman M.I. Adham , LogicVision
Russell Abbott , LogicVision
IEEE Std 1500 enables automation and hence allows for easier and faster integration of embedded cores into an SoC. This article describes an automated test development system based on the concept of embedded test.
hierarchical test, embedded test, IEEE Std 1500, core isolation, shared isolation, WSP, TAP
Benoit Nadeau-Dostie, Saman M.I. Adham, Russell Abbott, "Improved Core Isolation and Access for Hierarchical Embedded Test", IEEE Design & Test of Computers, vol.26, no. 1, pp. 18-25, January/February 2009, doi:10.1109/MDT.2009.13
1. IEEE Std 1149.1-2001, Standard Test Access Port and Boundary Scan Architecture, IEEE, 2001.
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3. R.K. Gupta and Y. Zorian, "Introducing Core-Based System Design," IEEE Design and Test, vol. 14, no. 4, Oct.-Dec. 1997, pp. 15-25.
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5. B. Nadeau-Dostie et al., "Hierarchical Design and Test Method and System, Program Product Embodying the Method and Integrated Circuit Produced Thereby," US patent 6,615,392, to LogicVision Inc., Patent and Trademark Office, 2003.
6. IEEE Std 1500-2007, Standard Testability Method for Embedded Core-Based Integrated Circuits, IEEE, 2007.
7. B. Nadeau-Dostie ed., Design for At-Speed Test, Diagnosis and Measurement, Kluwer Academic, 2000.
8. S. Pateras, "Achieving At-Speed Structural Test," IEEE Design &Test, vol. 20, no. 5, 2003, pp. 26-33.
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