Issue No. 03 - May-June (2008 vol. 25)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MDT.2008.78
Grant Martin , Tensilica
This is a review of <em>Creating Assertion-Based IP</em> (by Harry D. Foster and Adam C. Krolnik)—a tutorial on creating assertion-based verification IP for real designs, applicable to various classes of design blocks found in today's systems. This book uses the specific syntax of System-Verilog Assertions (SVA) and the verification environment of the Advanced Verification Methodology (AVM). However, the same principles apply to other assertion specification languages and within the context of other verification environments. Perhaps most importantly, this book teaches a way of thinking about creating and using assertion-based verification IP.
verification IP, assertion-based IP, System-Verilog Assertions, Advanced Verification Methodology, Open Verification Methodology
G. Martin, "Learning to assert yourself," in IEEE Design & Test of Computers, vol. 25, no. , pp. 284-285, 2008.