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Issue No. 03 - May-June (2008 vol. 25)
ISSN: 0740-7475
pp: 240-248
Yu Huang , Mentor Graphics
Ruifeng Guo , Mentor Graphics
Wu-Tung Cheng , Mentor Graphics
James Chien-Mo Li , National Taiwan University
ABSTRACT
Scan-based testing has proven to be a cost-effective method for achieving good test coverage in digital circuits. The Achilles heel in the application of scan-based testing is the integrity of the scan chains. From 10% to 30% of all defects cause scan chains to fail, and chain failures account for almost 50% of chip failures. Therefore, scan chain failure diagnosis is important for effective scan-based testing. Chain patterns alone are sufficient to determine the fault type, but they are insufficient to pinpoint the index of a failing flip-flop. This is the fundamental motivation for chain failure diagnosis, which is the process of identifying one or multiple defective scan cells in a scan chain or defective scan-enable or clock signals. This article surveys chain fault diagnosis techniques. The authors classify these techniques into three categories: tester based, hardware based, and software based.
INDEX TERMS
scan chain, chain diagnosis, survey, chain pattern, scan pattern, chain failure
CITATION

J. C. Li, W. Cheng, Y. Huang and R. Guo, "Survey of Scan Chain Diagnosis," in IEEE Design & Test of Computers, vol. 25, no. , pp. 240-248, 2008.
doi:10.1109/MDT.2008.83
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