Issue No. 02 - March-April (2008 vol. 25)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MDT.2008.31
Sachin Sapatnekar , University of Minnesota
This is a review of <em>Design for Manufacturability and Yield for Nano-Scale CMOS</em> (by Charles Chiang and Jamil Kawa). DFM is a rapidly growing field that uses design techniques to improve manufacturing yield. However, the dilution in the interface between design and manufacturing implies that today, to build a circuit with enhanced yield, a designer must know more about manufacturing than ever before. The first step to embracing yield considerations is to learn about them, and this book portrays the landscape of this area in an excellent way. It describes methods for modeling variations, optimizing them, and learning to design around them when they occur. The overall structure of this book is well thought out and logical, and the reader who peruses it will be rewarded with an excellent view of the field.
design for manufacturability, DFM, yield, nanoscale, CMOS, modeling variations
Sachin Sapatnekar, "Building your yield of dreams", IEEE Design & Test of Computers, vol. 25, no. , pp. 194-195, March-April 2008, doi:10.1109/MDT.2008.31