Issue No. 02 - March-April (2008 vol. 25)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MDT.2008.52
Test data compression became an active research topic in the late 1990s, and has now become a standard offering within commercial DFT solutions. This issue of IEEE Design & Test features a special issue on the current state of test compression. This issue of D&T also concludes the theme of design and test of RFIC chips (featured in the Jan./Feb. 08 issue), with two additional articles. In addition, this issue features two general-interest articles and an interview with DRAM inventor Bob Dennard.
test compression, test vectors, DFT, RFIC chips, Bob Dennard
T. Cheng, "Test compression saves bits, cycles, and money," in IEEE Design & Test of Computers, vol. 25, no. , pp. 105, 2008.