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Issue No.01 - January-February (2008 vol.25)
pp: 52-62
Jorgen Peddersen , University of New South Wales
Sri Parameswaran , University of New South Wales
This article illustrates a low-impact, general method for power and energy management of embedded computing systems. Small counters are added to a system to estimate power and energy consumption of the processor and peripherals in parallel with their execution. This methodology has been applied to an existing 32-bit processor, and a range of benchmarks have demonstrated an average power error of 2%, and an energy estimation error of less than 1.5%. The system adds little impact to the design, with only a 4.9% increase in chip area and a 3% increase in average power consumption. The authors showcase the system by processing a few frames of differing JPEG images, and providing an application that dynamically manages power using the proposed approach.
power estimation, macromodeling, counters, energy aware, low-impact processor, runtime power management
Jorgen Peddersen, Sri Parameswaran, "Low-Impact Processor for Dynamic Runtime Power Management", IEEE Design & Test of Computers, vol.25, no. 1, pp. 52-62, January-February 2008, doi:10.1109/MDT.2008.23
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