Issue No.02 - March-April (2007 vol.24)
Priyadarsan Patra , Intel
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MDT.2007.54
Major semiconductor companies experience postsilicon validation turning into an expensive, time-consuming proposition, yet very few college graduates are formally trained in this area. Validation is the activity of ensuring a product satisfies its reference specifications, runs with relevant software and hardware, and meets user expectations. This Perspectives article discusses some of the key challenges to successful validation and shows why a radical transformation is necessary if validation is to be effective in the near future.
validation wall, logic, low DPM, virtual platform, modular validation
Priyadarsan Patra, "On the cusp of a validation wall", IEEE Design & Test of Computers, vol.24, no. 2, pp. 193-196, March-April 2007, doi:10.1109/MDT.2007.54