Issue No. 02 - March-April (2007 vol. 24)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MDT.2007.48
Nicola Bombieri , University of Verona
Franco Fummi , University of Verona
Graziano Pravadelli , University of Verona
Andrea Fedeli , STMicroelectronics
Transaction-level modeling (TLM) has been proposed as the leading strategy to address the ever-increasing complexity of digital systems. However, its introduction brings a new challenge for designers and verification engineers. Because no tools are available to automatically derive an RTL implementation from a transaction-level (TL) design, manual refinements are necessary. This article presents a hybrid, incremental assertion-based verification (ABV) methodology to check the correctness of the TL-to-RTL refinement. The methodology relies on reusing assertions and already-checked code and is guided by assertion coverage metrics.
hybrid, assertion-based verification, TLM, design flow, RTL
A. Fedeli, G. Pravadelli, F. Fummi and N. Bombieri, "Hybrid, Incremental Assertion-Based Verification for TLM Design Flows," in IEEE Design & Test of Computers, vol. 24, no. , pp. 140-152, 2007.