Issue No.06 - November/December (2006 vol.23)
Published by the IEEE Computer Society
Grant Martin , Tensilica
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MDT.2006.153
This is a review of <em>Networks on Chips: Technology and Tools</em>, by Giovanni De Micheli and Luca Benini. This comprehensive survey and integrated reference work on networks on chips (NoCs) offers both breadth in covering most of the major work in this area and depth in delving into all the related issues involved in designing advanced on-chip interconnect networks.
With the rise of SoCs, yesterday's and today's on-chip interconnect structures are becoming increasingly inadequate to address the variety, sizes, priorities, and amount of on-chip communications necessary for the processors, memories, hardware accelerators, and I/O blocks in these advanced devices. During the past few years, there's been growing interest in networks on chips. Although their actual use in industrial SoC design has been relatively limited, this could soon change as an increasing number of researchers in both academia and industry begin to share their results. Already, several researchers have presented papers on this topic at conferences. Important research groups studying NoCs have sprung up at several major universities and research institutes. The September-October 2005 IEEE Design and Test included a special issue on NoCs, and there have been some books that have gathered together major research work in this area.
What has been missing has been a comprehensive survey and integrated reference work on NoCs—one that offers both breadth in covering most of the major work in this area and depth in delving into all the related issues involved in designing advanced on-chip interconnect networks. The first book of this kind has now appeared to fill this gap: Networks on Chips: Technology and Tools, by Giovanni De Micheli and Luca Benini plus nine other contributors.
Just as NoCs have inherited the concept of a communication network on a chip from the more familiar voice and data networks found in advanced wired telephony, wireless communications, and wired data networks, it's also appropriate to think about NoCs using the same kind of layered stack approach as is common in the networking area. The Open Systems Interconnection (OSI) ISO protocol architectural model for communications divides the stack into seven layers: physical, data link, network, transport, session, presentation, and application. So too does this book divide the description of NoCs into layers that map to chapters, although the specific layering is relevant to the scope of on-chip networks.
The first two chapters set the scene, with an overview of NoCs in chapter 1, and a review of the basic principles of network architectures (along with some introductory examples) in chapter 2. Chapter 1 also introduces the mapping of levels that the rest of the book uses. With chapter 3, the layering begins with the physical network layer, which includes issues of deep-submicron SoC process technology and their impact on on-chip interconnects; high-performance signaling options; and building blocks such as switches, buffers, and circuit sizing.
Chapter 4 moves to the data link layer, and discusses issues of reliability, fault modeling, coding, error correction, and flow control. Chapter 5, which deals with the network and transport layers, addresses quality of service and NoC topologies, switching, addressing and routing, and congestion and flow control at this level. Chapter 6 focuses on network interface architecture and design, including communication protocols, new advances in processor interfaces, packetization, flow control at this higher level, and packet and circuit switching. It also discusses both standard and new on-chip bus architectures, as well as emerging NoC approaches.
Chapter 7 is at the software level, with a discussion of NoC programming, including issues of task-level concurrency, communication programming interfaces, and some software development tools. Chapter 8 is somewhat complementary, dealing with design methodologies and CAD tool flows for NoCs. Finally, chapter 9 gives some design case studies focusing on the Korea Advanced Institute of Science and Technology (KAIST) Basic On-chip Network (BONE) series of NoC examples.
Chapters 3 through 6, 8, and 9 include considerable material from the other nine contributors, yet the book is knit together nicely into a coherent, comprehensive whole. Each chapter has an extensive reference list and a good survey of the most important work in the field. My interest grew as I advanced up the NoC stack from chapter to chapter, although that may be partly due to my system-level design focus. There is some repetition of topics from chapter to chapter—for example, flow control is discussed in chapters 4, 5, and 6—but each chapter focuses on the particular parts of the topic that are most relevant to the level at hand.
Chapters 6 and 8 in particular cover several case studies that are very valuable in the context of the book as a whole. The former covers the Æthereal, Xpipes, and Mango examples; the latter covers the KAIST BONE 1, 2, and 3 and Flexible On-chip Network (FONE) series of designs. Many other chapters draw extensively on real research implementations and their results to illustrate the trade-offs and constraints involved in NoC design—a very useful aspect of the book.
Every book could stand improvement, and there are three aspects of this one that could have been better. First, chapter 4 deals a little too much with coding theory and principles, and could have reduced the amount of time spent on this topic, perhaps pointing the reader to key references or another survey text. Second, chapter 7 is not really about NoCs; it discusses issues of architecture, on-chip communications abstractions, task-level concurrency, APIs, and tools that are really general multiprocessor SoC (MPSoC) topics, not necessarily NoC-restricted issues. (However, notwithstanding that point, it is actually one of the best summaries available on the major issues involved in programming at the MPSoC level.) Finally, the book could really use a brief concluding chapter—a chapter 10—that would sum up the conclusions reached in the previous chapters and make some strong recommendations for designers regarding the kinds of NoC architectures they should consider in their future SoCs.
Despite these minor weaknesses, the book provides an excellent introduction to the complexities of NoC design. It has clear use as a textbook or reference work for advanced undergraduate and graduate courses. It will also be valuable to any practitioner who wants an introduction and reference that covers this field. If "NoC, NoC … Who's there?" is the question, this book really gives a great answer. Every reader will come away with an education on this topic.