Issue No. 03 - May/June (2006 vol. 23)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MDT.2006.59
Vincent Kerz?rho , Philips Semiconductors and LIRMM
Philippe Cauvet , Philips Semiconductors
Serge Bernard , LIRMM
Florence Aza? , LIRMM
Mariane Comte , LIRMM
Michel Renovell , LIRMM
Editor's note: Testing mixed-signal circuits remains one of the most difficult challenges within the semiconductor industry. In this article, the authors present a novel DFT technique to test sets of ADCs and DACs embedded in a complex SiP. The technique provides fully digital testing on the converters to significantly reduce the cost of testing.
ADC, DAC, mixed-signal testing, DFT, SiP, system-in-package
V. Kerz?rho, S. Bernard, M. Comte, P. Cauvet, F. Aza? and M. Renovell, "A Novel DFT Technique for Testing Complete Sets of ADCs and DACs in Complex SiPs," in IEEE Design & Test of Computers, vol. 23, no. , pp. 234-243, 2006.