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Issue No. 02 - March/April (2006 vol. 23)
ISSN: 0740-7475
pp: 160-161
Brian Bailey , Brian Bailey Consulting
ABSTRACT
A review of the book, "Verification Methodology Manual for SystemVerilog," by Janick Bergeron et al.
INDEX TERMS
verification, formal verification, SystemVerilog, design reuse, testbench
CITATION
Brian Bailey, "Was it worth the wait? Yes!", IEEE Design & Test of Computers, vol. 23, no. , pp. 160-161, March/April 2006, doi:10.1109/MDT.2006.56
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