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Issue No. 06 - November/December (2005 vol. 22)
ISSN: 0740-7475
pp: 598-599
An evening panel session entitled "Microelectronics and Test in 'The New Europe'--Challenges and Opportunities in Research and Industry," took place on 23 May at the 10th European Test Symposium (ETS 05). Raimund Ubar and Hans-Joachim Wunderlich (University of Stuttgart) organized the panel session, and Erik Jan Marinissen (Philips Research) served as moderator. Panelists included representatives of the Eastern European countries that have recently joined the EU, those who live and work outside the EU, and Western companies with branches or subcontractors in Eastern European countries.A panel session at the 3rd IEEE Infrastructure IP (IIP) Workshop held in conjunction with the VLSI Test Symposium focused on the question, "Is silicon debug the Cinderella of infrastructure IP?" <em>IEEE Design & Test</em> coorganized the panel session, and R. Chandramouli of Virage Logic served as chair.
microelectronics, IEEE European Test Symposium, silicon debug, infrastructure IP, IEEE Infrastructure IP Workshop

"Panel Summaries," in IEEE Design & Test of Computers, vol. 22, no. , pp. 598-599, 2005.
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