Issue No. 06 - November/December (2005 vol. 22)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MDT.2005.137
Sachin Sapatnekar , University of Minnesota
Statistical Analysis and Optimization for VLSI: Timing and Power, by Ashish Srivastava, Dennis Sylvester, and David Blaauw (Springer, 2005, ISBN 0-38-725738-1, 279 pp., $129). Variation-tolerant techniques based on statistical design have been the focus of intense research over the past few years. This book is the first detailed survey of developments in this field; it is an excellent resource for anyone interested in learning about the topic, as well as a practitioner or researcher seeking a quick reference. Users of statistical analysis and optimization CAD tools will find it invaluable because it provides the background required to separate the wheat from the chaff.
VLSI, statistical analysis, timing analysis, power analysis, optimization, CAD tools
Sachin Sapatnekar, "Designing "Vary" Good Circuitry", IEEE Design & Test of Computers, vol. 22, no. , pp. 596-597, November/December 2005, doi:10.1109/MDT.2005.137