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Issue No. 06 - November/December (2005 vol. 22)
ISSN: 0740-7475
pp: 520-531
Cristinel Ababei , University of Minnesota
Yan Feng , University of Minnesota
Brent Goplen , University of Minnesota
Hushrav Mogal , University of Minnesota
Tianpei Zhang , University of Minnesota
Kia Bazargan , University of Minnesota
Sachin Sapatnekar , University of Minnesota
Advanced manufacturing and packaging techniques are permitting a glimpse at the near-future, where wires can go in three dimensions, and ICs made in diverse processes can be assembled together--sandwich like--to achieve ever higher levels of integration. This article focuses on a specific CAD problem in connection with 3D ICs: how to partition, place, and wire a design subject to various constraints on power, timing, and manufacturability.
Placement and routing, VLSI

T. Zhang et al., "Placement and Routing in 3D Integrated Circuits," in IEEE Design & Test of Computers, vol. 22, no. , pp. 520-531, 2005.
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