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Issue No. 06 - November/December (2004 vol. 21)
ISSN: 0740-7475
pp: 563-571
Bipul C. Paul , Purdue University
Kaushik Roy , Purdue University
<it>Editors' note: </it>Scaled manufacturing technologies require advanced techniques for improving device reliability and production yield. This article presents a transistor-level redundancy technique for manufacturing devices with low vulnerability and improving yield in future circuits. The technique relies on appropriate design style selection and controlled redundancy to achieve area and power trade-offs. <it>—Dimitris Gizopoulos, University of Piraeus</it>
Bipul C. Paul, Kaushik Roy, Naran Sirisantana, "Enhancing Yield at the End of the Technology Roadmap", IEEE Design & Test of Computers, vol. 21, no. , pp. 563-571, November/December 2004, doi:10.1109/MDT.2004.86
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