The Community for Technology Leaders
Green Image
Issue No. 02 - March/April (2004 vol. 21)
ISSN: 0740-7475
pp: 94-101
J. Douglas Gibson , Hewlett-Packard
Carl Scafidi , Intel
Rohit Bhatia , Hewlett-Packard
As modern microprocessor designs become increasingly complex, certain units often receive less coverage than others during full-chip functional verification. A stable RTL model does not necessarily indicate that all units are equally stable. The authors illustrate the need for unit-level functional verification and present an effective methodology for verifying the XPN unit in the Itanium 2 microprocessor.
J. Douglas Gibson, Carl Scafidi, Rohit Bhatia, "Validating the Itanium 2 Exception Control Unit: A Unit-Level Approach", IEEE Design & Test of Computers, vol. 21, no. , pp. 94-101, March/April 2004, doi:10.1109/MDT.2004.1277901
93 ms
(Ver 3.1 (10032016))