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Issue No. 06 - November/December (vol. 20)
ISSN: 0740-7475

Cycle decomposition in NCL (Abstract)

pp. 38-43

The tides of EDA (PDF)

pp. 59-75
From the EIC

Guest Editors' Introduction: Clockless VLSI Systems (HTML)

Yong-Bin Kim , Northeastern University
Fabrizio Lombardi , Northeastern University
Soha Hassoun , Tufts University
pp. 5-8

Three Generations of Asynchronous Microprocessors (Abstract)

Alain J. Martin , California Institute of Technology
Mika Nystr? , California Institute of Technology
Catherine G. Wong , California Institute of Technology
pp. 9-17

Design and Characterization of Null Convention Self-Timed Multipliers (Abstract)

Minsu Choi , University of Missouri-Rolla
Scott C. Smith , University of Missouri-Rolla
Satish K. Bandapati , University of Missouri-Rolla
pp. 26-36

Cycle Decomposition in NCL (Abstract)

Lief Sorenson , Theseus Logic
Steve Masteller , Theseus Logic
pp. 38-43

Implementation of a Self-Timed Segmented Bus (Abstract)

Pasi Liljeberg , University of Turku
Tiberiu Seceleanu , University of Turku
Juha Plosila , University of Turku
pp. 44-50

Automating Wave-Pipelined Circuit Design (Abstract)

Yong-Bin Kim , Northeastern University
Woo Jin Kim , Sun Microsystems
pp. 51-58
Special Section: Perspectives in EDA

The Tides of EDA (Abstract)

Alberto Sangiovanni-Vincentelli , University of California at Berkeley
pp. 59-75
The Road Ahead

How much variability can designers tolerate? (Abstract)

Andrew B. Kahng , University of California, San Diego
pp. 96-97
Panel Summaries

Panel Summaries (Abstract)

Grant Martin , Cadence
Eric Dupont , iRoC Technologies
pp. 100-102
Conference Reports

Conference Reports (Abstract)

Raimund Ubar , Tallinn Technical University
Vladimir Hahanov , Kharkov National University of Radioelectronics
pp. 103

Test Technology TC Newsletter (Abstract)

pp. 104-105
Annual Index
The Last Byte

A clockless future for systems on chip (Abstract)

Conrad H. Ziesler , University of Michigan
pp. 120
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