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TABLE OF CONTENTS
Issue No. 06 - November/December (vol. 20)
ISSN: 0740-7475

Three generations of asynchronous microprocessors (Abstract)

A.J. Martin , California Inst. of Technol., Pasadena, CA, USA
M. Nystrom , California Inst. of Technol., Pasadena, CA, USA
C.G. Wong , California Inst. of Technol., Pasadena, CA, USA
pp. 9-17

Design and characterization of null convention self-timed multipliers (Abstract)

S.K. Bandapati , Missouri Univ., Rolla, MO, USA
S.C. Smith , Missouri Univ., Rolla, MO, USA
M. Choi , Missouri Univ., Rolla, MO, USA
pp. 26-36

Cycle decomposition in NCL (Abstract)

S. Masteller , Theseus Logic Inc., Orlando, FL, USA
L. Sorenson , Theseus Logic Inc., Orlando, FL, USA
pp. 38-43

Implementation of a self-timed segmented bus (Abstract)

J. Plosila , Turku Univ., Finland
T. Seceleanu , Turku Univ., Finland
P. Liljeberg , Turku Univ., Finland
pp. 44-50

The tides of EDA (PDF)

A. Sangiovanni-Vincentelli , California Univ., Berkeley, CA, USA
pp. 59-75

New advanced library format standard approved (PDF)

W. Roethig , EDA R&D, NEC, USA
pp. 98-99
From the EIC
Features

Guest Editors' Introduction: Clockless VLSI Systems (HTML)

Soha Hassoun , Tufts University
Yong-Bin Kim , Northeastern University
Fabrizio Lombardi , Northeastern University
pp. 5-8

Three Generations of Asynchronous Microprocessors (Abstract)

Alain J. Martin , California Institute of Technology
Mika Nystr? , California Institute of Technology
Catherine G. Wong , California Institute of Technology
pp. 9-17

Design and Characterization of Null Convention Self-Timed Multipliers (Abstract)

Satish K. Bandapati , University of Missouri-Rolla
Scott C. Smith , University of Missouri-Rolla
Minsu Choi , University of Missouri-Rolla
pp. 26-36

Cycle Decomposition in NCL (Abstract)

Steve Masteller , Theseus Logic
Lief Sorenson , Theseus Logic
pp. 38-43

Implementation of a Self-Timed Segmented Bus (Abstract)

Juha Plosila , University of Turku
Tiberiu Seceleanu , University of Turku
Pasi Liljeberg , University of Turku
pp. 44-50

Automating Wave-Pipelined Circuit Design (Abstract)

Woo Jin Kim , Sun Microsystems
Yong-Bin Kim , Northeastern University
pp. 51-58
Special Section: Perspectives in EDA

The Tides of EDA (Abstract)

Alberto Sangiovanni-Vincentelli , University of California at Berkeley
pp. 59-75
The Road Ahead

How much variability can designers tolerate? (Abstract)

Andrew B. Kahng , University of California, San Diego
pp. 96-97
Standards
Panel Summaries

Panel Summaries (Abstract)

Eric Dupont , iRoC Technologies
Grant Martin , Cadence
pp. 100-102
Conference Reports

Conference Reports (Abstract)

Vladimir Hahanov , Kharkov National University of Radioelectronics
Raimund Ubar , Tallinn Technical University
pp. 103
Newsletters

Test Technology TC Newsletter (Abstract)

pp. 104-105
Annual Index
The Last Byte

A clockless future for systems on chip (Abstract)

Conrad H. Ziesler , University of Michigan
pp. 120
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