Issue No. 06 - November/December (2003 vol. 20)
Alain J. Martin , California Institute of Technology
Mika Nystr? , California Institute of Technology
Catherine G. Wong , California Institute of Technology
<p><it>Editor's note:</it>This article traces the evolution of Caltech asynchronous processors from a simple proof of concept, to a high-performance MIPS-like processor using a different buffer circuit for better performance, to the latest 8051 clone targeting low-energy operation. The authors describe the control aspects of the evolving circuit styles.</p><p><it>—Yong-Bin Kim, Northeastern University</it></p>
A. J. Martin, M. Nystr? and C. G. Wong, "Three Generations of Asynchronous Microprocessors," in IEEE Design & Test of Computers, vol. 20, no. , pp. 9-17, 2003.