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Issue No. 04 - July/August (vol. 20)
ISSN: 0740-7475
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Special Features

Solving Satisfiability in Combinational Circuits (Abstract)

Jo? Marques-Silva , Technical University of Lisbon
Lu? Guerra e Silva , Technical University of Lisbon
pp. 16-21

Compacting Test Responses for Deeply Embedded SoC Cores (Abstract)

Ozgur Sinanoglu , University of California, San Diego
Alex Orailoglu , University of California, San Diego
pp. 22-30

A Hierarchical Infrastructure for SoC Test Management (Abstract)

Alfredo Benso , Politecnico di Torino
Stefano Di Carlo , Politecnico di Torino
Paolo Prinetto , Politecnico di Torino
Yervant Zorian , Virage Logic
pp. 32-39

Fault Models and Test Generation for Hardware-Software Covalidation (Abstract)

Ian G. Harris , University of California, Irvine
pp. 40-47

Power-Conscious Test Synthesis and Scheduling (Abstract)

Nicola Nicolici , McMaster University
Bashir M. Al-Hashimi , University of Southampton
pp. 48-55

An Efficient, Low-Cost I/O Subsystem for Network Processors (Abstract)

Dionisios N. Pnevmatikatos , Technical University of Crete
Ioannis Sourdis , Technical University of Crete
Kyriakos Vlachos , Bell Laboratories, Lucent Technologies
pp. 56-64

The Evolution of SystemVerilog (Abstract)

David I. Rich , Synopsys
pp. 82-84
Panel Summaries

Panel Summaries (Abstract)

pp. 86-88
Conference Reports

TTTC Newsletter (Abstract)

pp. 90-91

DATC Newsletter (Abstract)

pp. 93
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