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Issue No. 03 - May/June (vol. 20)
ISSN: 0740-7475

Impact of low-impedance substrate on power supply integrity (Abstract)

R. Panda , Motorola Inc., Austin, TX, USA
S. Sundareswaran , Motorola Inc., Austin, TX, USA
pp. 16-22

Clock and power gating with timing closure (Abstract)

A. Mukheijee , Univ. of North Carolina, Charlotte, NC, USA
pp. 32-39

Microarchitectural dl/dt control (Abstract)

E. Grochowski , Univ. of California, Berkeley, CA, USA
pp. 40-47

DAC Highlights (PDF)

L. Lavagno , Cadence Berkeley Labs
pp. 88-89
EIC Message

Guest Editors' Introduction: On-Chip Power Distribution Networks (HTML)

Soha Hassoun , Tuffs University
Sani R. Nassif , IBM Austin Research Laboratory
pp. 5-6

Analysis and Optimization of Power Grids (Abstract)

Sachin S. Sapatnekar , University of Minnesota
Haihua Su , IBM
pp. 7-15

Impact of Low-Impedance Substrate on Power Supply Integrity (Abstract)

David Blaauw , University of Michigan, Ann Arbor
Rajendran Panda , Motorola, Austin
Savithri Sundareswaran , Motorola, Austin
pp. 16-22

Electrical Modeling of Integrated-Package Power and Ground Distributions (Abstract)

Lawrence Pileggi , Carnegie Mellon University
Hui Zheng , Carnegie Mellon University
pp. 24-31
Special Infrastructure IP Section

Online Self-Repair of FIR Filters (Abstract)

Alfredo Benso , Politecnico di Torino
Paolo Prinetto , Politecnico di Torino
Giorgio Di Natale , Politecnico di Torino
Stefano Di Carlo , Politecnico di Torino
pp. 50-57

Benefits of a SoC-Specific Test Methodology (Abstract)

Zhigang Jiang , University of Southern California
Sandeep K. Gupta , University of Southern California
Md. Saffat Quasem , University of Southern California
pp. 68-77
DAC Watch

DAC Highlights (Abstract)

Luciano Lavagno , Cadence Berkeley Labs
Limor Fix , Intel
pp. 88-89
Special Report: CADathlon

First CADathlon Programming Contest held at 2002 ICCAD (Abstract)

Geert Janssen , IBM T.J. Watson Research Center
Soha Hassoun , Tufts University
pp. 104-107
DTAP Update

IEEE CASS becomes D&T Copublisher (Abstract)

Yervant Zorian , Virage Logic
pp. 108
The Road Ahead

Bringing down NRE (Abstract)

Andrew B. Kahng , University of California, San Diego
pp. 110-111

VHDL-200X: The Next Revision (Abstract)

Peter J. Ashenden , Ashenden Designs
pp. 112-113
Panel Summaries

Who Cares about System Verification? (Abstract)

Tom Anderson , O-In Design Automation
pp. 114
Conference Reports

Conference Reports (Abstract)

pp. 115

TTTC Newsletter (Abstract)

pp. 116-117

DATC Newsletter (Abstract)

pp. 118
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